dc.contributor.author | Pudi, Dhilleswararao | |
dc.contributor.author | Harrison, Samuel Jigme | |
dc.contributor.author | Stathis, Dimitrios | |
dc.contributor.author | Boppu, Srinivas | |
dc.contributor.author | Hemani, Ahmed | |
dc.contributor.author | Cenkeramaddi, Linga Reddy | |
dc.date.accessioned | 2022-11-10T14:07:13Z | |
dc.date.available | 2022-11-10T14:07:13Z | |
dc.date.created | 2022-09-19T17:17:54Z | |
dc.date.issued | 2022 | |
dc.identifier.citation | Pudi, D., Harrison, S.J., Stathis, D., Boppu, S., Hemani, A. & Cenkeramaddi, L.R. (2022). Methodology for Structured Data-Path Implementation in VLSI Physical Design: A Case Study. Electronics, 11(18), 1-15. | en_US |
dc.identifier.issn | 2079-9292 | |
dc.identifier.uri | https://hdl.handle.net/11250/3031245 | |
dc.description.abstract | State-of-the-art modern microprocessor and domain-specific accelerator designs are dominated by data-paths composed of regular structures, also known as bit-slices. Random logic placement and routing techniques may not result in an optimal layout for these data-path-dominated designs. As a result, implementation tools such as Cadence’s Innovus include a Structured Data-Path (SDP) feature that allows data-path placement to be completely customized by constraining the placement engine. A relative placement file is used to provide these constraints to the tool. However, the tool neither extracts nor automatically places the regular data-path structures. In other words, the relative placement file is not automatically generated. In this paper, we propose a semi-automated method for extracting bit-slices from the Innovus SDP flow. It has been demonstrated that the proposed method results in 17% less density or use for a pixel buffer design. At the same time, the other performance metrics are unchanged when compared to the traditional place and route flow. | en_US |
dc.language.iso | eng | en_US |
dc.publisher | MDPI | en_US |
dc.rights | Navngivelse 4.0 Internasjonal | * |
dc.rights.uri | http://creativecommons.org/licenses/by/4.0/deed.no | * |
dc.title | Methodology for Structured Data-Path Implementation in VLSI Physical Design: A Case Study | en_US |
dc.type | Peer reviewed | en_US |
dc.type | Journal article | en_US |
dc.description.version | publishedVersion | en_US |
dc.rights.holder | © 2022 The author(s) | en_US |
dc.subject.nsi | VDP::Teknologi: 500::Informasjons- og kommunikasjonsteknologi: 550 | en_US |
dc.source.pagenumber | 1-15 | en_US |
dc.source.volume | 11 | en_US |
dc.source.journal | Electronics | en_US |
dc.source.issue | 18 | en_US |
dc.identifier.doi | https://doi.org/10.3390/electronics11182965 | |
dc.identifier.cristin | 2053261 | |
dc.relation.project | Norges forskningsråd: 287918 | en_US |
dc.source.articlenumber | 2965 | en_US |
cristin.qualitycode | 1 | |