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dc.contributor.authorLi, Shuo
dc.contributor.authorXiang, Zhengrong
dc.contributor.authorKarimi, Hamid Reza
dc.date.accessioned2015-02-13T07:57:13Z
dc.date.available2015-02-13T07:57:13Z
dc.date.issued2014
dc.identifier.citationLi, S., Xiang, Z., & Karimi, H. R. (2014). Positive L1 observer design for positive Switched systems. Circuits, Systems, and Signal Processing, 33(7), 2085-2106. doi: 10.1007/s00034-013-9737-6nb_NO
dc.identifier.issn1531-5878
dc.identifier.urihttp://hdl.handle.net/11250/276229
dc.descriptionPublished version of an article in the journal: Circuits, Systems, and Signal Processing. Also available from the publisher at: http://dx.doi.org/10.1007/s00034-013-9737-6nb_NO
dc.description.abstractThis paper investigates the problem of L1 observer design for positive switched systems. Firstly, a new kind of positive L1 observer is proposed for positive switched linear delay-free systems with observable and unobservable subsystems. Based on the average dwell time approach, a sufficient condition is proposed to ensure the existence of the positive L1 observer. Under the condition obtained, the estimated error converges to zero exponentially, and the L1 -gain from the disturbance input to the estimated error is less than a prescribed level. Then the proposed design result is extended to positive switched systems with mixed time-varying delays, where the mixed time-varying delays are presented in the form of discrete delay and distributed delay. Finally, two numerical examples are given to demonstrate the feasibility of the obtained results.nb_NO
dc.language.isoengnb_NO
dc.publisherSpringernb_NO
dc.subjectpositive observernb_NO
dc.subjectswitched systemsnb_NO
dc.subjectexponetial stabiblitynb_NO
dc.subjecttime-varying delaysnb_NO
dc.subjectaverage dwell timenb_NO
dc.titlePositive L1 observer design for positive Switched systemsnb_NO
dc.typeJournal articlenb_NO
dc.typePeer reviewednb_NO
dc.subject.nsiVDP::Mathematics and natural science: 400::Mathematics: 410::Analysis: 411nb_NO
dc.subject.nsiVDP::Technology: 500::Mechanical engineering: 570nb_NO
dc.source.pagenumber2085-2106nb_NO
dc.source.volume33nb_NO
dc.source.journalCircuits, Systems, and Signal Processingnb_NO
dc.source.issue7nb_NO
dc.identifier.doi10.1007/s00034-013-9737-6


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