Vis enkel innførsel

Torus Topology based Fault-Tolerant Network-on-Chip Design with Flexible Spare Core Placement

dc.contributor.authorVeda Bhanu, P.
dc.contributor.authorKulkarni, Pranav
dc.contributor.authorSoumya, J.
dc.contributor.authorCenkeramaddi, Linga Reddy
dc.contributor.authorIdsøe, Henning
dc.date.accessioned2019-04-03T11:16:40Z
dc.date.available2019-04-03T11:16:40Z
dc.date.created2019-01-30T16:07:48Z
dc.date.issued2018
dc.identifier.isbn978-1-5386-5386-9
dc.identifier.urihttp://hdl.handle.net/11250/2593145
dc.language.isoengnb_NO
dc.relation.ispartof14th Conference on PhD Research in Microelectronics and Electronics (PRIME)
dc.titleTorus Topology based Fault-Tolerant Network-on-Chip Design with Flexible Spare Core Placementnb_NO
dc.typeChapternb_NO
dc.typePeer reviewednb_NO
dc.description.versionsubmittedVersionnb_NO
dc.source.pagenumber97-100nb_NO
dc.identifier.doi10.1109/PRIME.2018.8430343
dc.identifier.cristin1669243
dc.description.localcodeNivå1nb_NO
cristin.unitcode201,15,4,0
cristin.unitnameInstitutt for informasjons- og kommunikasjonsteknologi
cristin.ispublishedtrue
cristin.fulltextpreprint
cristin.qualitycode1


Tilhørende fil(er)

Thumbnail
Filnavn:
Torus+topology+based+fault-tol ...
Størrelse:
216.8Kb
Format:
Ukjent
Åpne

Denne innførselen finnes i følgende samling(er)

Vis enkel innførsel